This article aims to assist the user with the setup and configuration of the analog option boards available for the CP series PLC. This article applies to the following option boards:
- CP1W-MAB221
- CP1W-ADB21
- CP1W-DAB21V
This guide does not apply to Analog Expansion Boards, such as CP1W-MAD42. For information on Analog Expansion Boards, please see the article: Configuring Analog Expansion Units for CP1 series PLC
Setup
CP2E/ CP1E
Set the serial communication settings in the PLC Settings. Connect the CX-Programmer to the CPU Unit, and then change the PLC Settings as follows.
For CP1E, N30/40/60 & NA20 CPU's only.
CP1L-EL/EM
For CPU Units with 30 and 40 points.
If the Analog Option Board is mounted on the Option Board slot 1 (left side), switch DipSW4 of the CPU unit to ON.
If the Analog Option Board is mounted on the Option Board slot 2 (right side), switch DipSW5 of the CPU unit to ON
For CPU Units with 20 I/O points, switch DipSW4 of the CPU unit to ON.
Note, DipSW4 and DipSW5 are OFF at shipment.
CP1L-M, CP1L-L, CP1L-M , CP1H
These CPU's do not support Analog Option Boards.
Memory Allocation
The memory allocation differs between PLC series, select the correct PLC series for your application below.
CP1L-EL/EM
CIO Area Allocation
The beginning CIO channel is shown in the following table.
I/O Capacity |
Option Port |
Beginning Channel (m) |
Channel Range |
20 |
Port 1 |
CIO2990 |
CIO2990 ~ CIO 2999 |
30/40 |
Port 1 (Left) |
CIO2980 |
CIO2980 ~ CIO2989 |
Port2 (Right) |
CIO2990 |
CIO2990 ~ CIO2999 |
The details of allocated CIO channels are described in the following table.
Channel |
Contents |
||
CP1W-ADB21 |
CP1W-DAB21V |
CP1W-MAB221 |
|
m |
Analog Input 1 |
Analog Input 1 |
|
m+1 |
Analog Input 2 |
Analog Input 2 |
|
m+2 to m+4 |
|||
m+5 |
Analog Output 1 |
Analog Output 1 |
|
m+6 |
Analog Output 2 |
Analog Output 2 |
|
m+7 to m+9 |
|||
Auxiliary Area Allocation
I/O Capacity |
AR Bits |
Option Port |
Content |
Error Process |
20 |
A435.15 |
Port 1 |
I/O option board run state |
0: Initial state or unit abnormity state 1: Work normally |
30/40 |
A435.14 |
Port 1 (Left) |
||
A435.15 |
Port 2 (Right) |
A435.14 or A435.15 sets on if analog option board is working normally. Then the user can read A/D input data and write D/A output data.
CP2E
CIO Area Allocation
The details of allocated CIO channels are described in the following table.
Channel |
Contents |
||
CP1W-ADB21 |
CP1W-DAB21V |
CP1W-MAB221 |
|
CIO80 |
Analog Input 1 |
Analog Input 1 |
|
CIO81 |
Analog Input 2 |
Analog Input 2 |
|
CIO82 to CIO84 |
|||
CIO85 |
Analog Output 1 |
Analog Output 1 |
|
CIO86 |
Analog Output 2 |
Analog Output 2 |
|
CIO87 to CIO89 |
|||
Auxiliary Area Allocation
CPU Unit |
AR Bits |
Option Board Port |
Content |
Error Process |
CP2E N30/N40/N60 CPU Unit |
A435.14 |
Port 1 (Left) |
I/O option board run state |
0: Initial state or unit abnormity state 1: Work normally |
A435.15 |
Port 2 (Right) |
|||
CP2E N14/N20 CPU Unit |
A435.14 |
Port 1 |
A435.14 or A435.15 sets on if analog option board is working normally. Then the user can read A/D input data and write D/A output data.
Only 1 Analog Option board can be mounted.
Mounting Analog Option Boards in both slots will result in an option board error.
CP1E-N
N30/40/60, NA20 CPU's only.
CIO Area Allocation
The details of allocated CIO channels are described in the following table.
Channel |
Contents |
||
CP1W-ADB21 |
CP1W-DAB21V |
CP1W-MAB221 |
|
CIO80 |
Analog Input 1 |
Analog Input 1 |
|
CIO81 |
Analog Input 2 |
Analog Input 2 |
|
CIO82 to CIO84 |
|||
CIO85 |
Analog Output 1 |
Analog Output 1 |
|
CIO86 |
Analog Output 2 |
Analog Output 2 |
|
CIO87 to CIO89 |
|||
Auxiliary Area Allocation
| AR Bits | Content | Error Process |
| A435.15 | I/O option board run state |
0: Initial state or unit abnormity state 1: work normally |
A435.15 sets on if analog option board is working normally. Then the user can read A/D input data and write D/A output data.
CP1L-M, CP1L-L, CP1L-M , CP1H
These CPU's do not support Analog Option Boards.
Please refer to the following documents for further information:
CP1L-EL/EM CPU Unit Operation Manual
CP1E CPU Unit Software User’s Manual